John,

>Yes, but I don't properly recall if the Itanium design was started
>before AMD64 came or as a reaction to the AMD64.  Haven't done any
>research for the real timelines.

Two single-line searches found that the Itanium was launched in 2001 and the AMD x64 was launched in 2003.

>It's a shame the Alpha architecture didn't make it, even though it did
>have some bad design decisions inside it's ISA and internal
>architecture.  It was still a pretty nice and clean 64-bit design.  As
>I recall, it's mostly the memory ordering around byte accesses that
>are the problem.

This is the first I have heard of these bad decisions.  Would you care to elaborate?

The memory ordering around byte accesses might have been because the Alpha was designed to be both little endian and big endian.  So were the MIPS chips.   While many vendors supported only big endian (Motorola, SPARC, etc.) DEC had been supporting little endian in their PDP-11s, VAX, MIPS and Alphas for data compatibility.   DEC supported little endian because it was cheaper electronically to have the data held in that fashion.

Sun made much fun of DEC for years having Unix systems that were little endian instead of big endian like "real workstations".   I kept asking them about these "Intel things" which were little endian too.   Sun sneered at me and told me that "Intel chips were not used in real computers".....that is until they ported Solaris to Intel and tried to mix them into their network.   Then I took real glee in asking them how they had data compatibility across NFS between SPARC and Intel.

As I said, you are the first to mention to me these bad decisions.  I am curious to know what they are.

md




On Thu, Feb 4, 2021 at 4:56 PM John Stoffel <john@stoffel.org> wrote:
>>>>> "Jon" == Jon \"maddog\" Hall <jon.maddog.hall@gmail.com> writes:

Yes, but I don't properly recall if the Itanium design was started
before AMD64 came or as a reaction to the AMD64.  Haven't done any
research for the real timelines.

It's a shame the Alpha architecture didn't make it, even though it did
have some bad design decisions inside it's ISA and internal
architecture.  It was still a pretty nice and clean 64-bit design.  As
I recall, it's mostly the memory ordering around byte accesses that
are the problem. 


Jon> Allow me translate what you said:

Jon> "As I recall, Itanium was Intel's attempt to bi-furcate the market and
Jon> keep 32bit for desktops and such, and to make their 64bit systems for
Jon> workstations and such a seperate product so they could take more
Jon> control of the motherboard, bios, etc"

Jon> to

Jon> "Itanium was Intel's abortive attempt to block AMD from making a
Jon> better, faster, cheaper 64-bit CISC product."

Jon> Shorter, and more to the point.



Jon> On Thu, Feb 4, 2021 at 4:13 PM John Stoffel <john@stoffel.org> wrote:

Jon>     As I recall, Itanium was Intel's attempt to bi-furcate the market and
Jon>     keep 32bit for desktops and such, and to make their 64bit systems for
Jon>     workstations and such a seperate product so they could take more
Jon>     control of the motherboard, bios, etc.

Jon>     Then AMD came out with the AMD64 64-bit extenstions to the Intel 386
Jon>     (486?) instruction set, since they had an architectural license to the
Jon>     ISA, so they just extended it and started shipping cheaper CPUs and
Jon>     chipsets that could easily suport more than 4gb of RAM, without
Jon>     requiring people to do major re-compiles of their software.
Jon>     Especially since it would support 32bit applications in a 64bit OS
Jon>     without *any* recompile needed.

Jon>     They ate Intel's lunch.  Which is why the Pentium 4 (I think) was such
Jon>     a monster chip in terms of CPU GHz and heat, because they were trying
Jon>     to catchup with the Opteron and other AMD chips.

Jon>     John

Tim> My perspective was from working at Stratus. Continuum at the time was our flagship line
Jon>     of servers
Tim> that ran on PA-RISC and with Itanium it was clear the end of the line for PA-RISC was
Jon>     coming.

Tim> Bob Evans and others who were more intimately involved can probably explain it better,
Jon>     but I
Tim> remember Stratus getting a couple Itanium development workstations and my recollection
Jon>     was that
Tim> the engineers weren't impressed. 
Tim> It wasn't a fundamental improvement on PA-RISC as far as they could tell. Ultimately VOS
Jon>     was
Tim> ported to Xeon and the rest is history. I'm sure someone somewhere is still happily
Jon>     running
Tim> PA-RISC based Stratus servers, but I have to imagine that number dwindles each year.

Tim> Personally I have a hypothesis that Intel had really put it's bets on Xeon and wasn't
Jon>     really that
Tim> invested in Itanium. What it did do was get HP out of the HPC market. It's fair to say
Jon>     that Xeon
Tim> based systems running Linux pretty much put the coffin nails in MIPS, PA-RISC and
Jon>     ultimately Sparc
Tim> and likely a few others I don't know about and with it the various operating systems that
Jon>     didn't
Tim> get ported to Xeon.

Tim> On Thu, Feb 4, 2021 at 11:44 AM Jon "maddog" Hall <jon.maddog.hall@gmail.com> wrote:

Tim>      I still vividly remember my boss showing me the plans for support of Intel's Itanium
Tim>      processor.

Tim>      As someone who taught operating systems and compiler design for a number of years I
Jon>     still
Tim>      remember my shock that THIS was the answer for Intel's 64-bit chip....an Ultra-Wide
Tim>      Instruction set.

Tim>      I wailed away about how all of this was WRONG, WRONG, WRONG.....mostly because I had
Jon>     spent the
Tim>      past six months proving why even a regular CISC system was the wrong answer, and here
Jon>     Intel
Tim>      was going in the opposite direction.

Tim>      After twenty minutes of me fuming my boss simply grinned, shrugged his shoulders and
Jon>     left my
Tim>      office.

Tim>      While I was proud of the fact that the Alpha processor was so prominent in the
Jon>     production of
Tim>      the movie "Titanic"......now I had to deal with a real life "Itanic"....watching it
Jon>     sink.

Tim>      md

Tim>      P.S.  It was only a month or so after, I think, that AMD came out with a reasonable
Jon>     extension
Tim>      to the i86 architecture....which (although it was not RISC) I was reasonably happy
Jon>     with.

Tim>      On Thu, Feb 4, 2021 at 7:24 AM Tim Keller via WLUG <wlug@lists.wlug.org> wrote:

Tim>          Hey Everybody,

Tim>          We've got a meeting next week on the 11th at our same time (7pm)

Tim>          As for a topic, if somebody would like to present something, I'd be up for it.
Tim>          I figure we'd all toast the depreciation of Itanium in the linux kernel. Good
Jon>     riddance!

Tim>          We'll definitely be talking about the PI4 Nano!!

Tim>          As usual, I'm sure other topics will organically surface.

Tim>          Location: Our usual Jitsu haunt: https://meet.jit.si/WlugMA

Tim>          Later,
Tim>          Tim.
Tim>          --
Tim>          I am leery of the allegiances of any politician who refers to their constituents
Jon>     as
Tim>          "consumers".
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Tim> --
Tim> I am leery of the allegiances of any politician who refers to their constituents as
Jon>     "consumers".

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