>More obscure. It has to do with how memory accesses to bytes are
>handled on the Alpha architecture. They're not very quick, because
>the Alpha wants to do all memory access in 32bit chunks.
"Quick" is in the eye of the beholder. Yes, the Alpha tended to access data in 32 bit "chunks" to get it into the registers. Being a RISC processor it was not as rich in data access on a byte level. On the other hand other CISC processors also accessed data on a 32-bit level, just that their instruction sets used microcode to make it look like they were only accessing a byte. The trade off was in executing multiple RISC instructions to one microcoded CISC instruction.
Would this bother a kernel developer writing a couple of lines of assembly language down at the very lowest level of the kernel....probably.
On the other hand for years Linus talked about the Alpha as the best architecture chip he knew, so it could not have been too bad.
md